{"id":15160,"date":"2026-03-09T10:16:26","date_gmt":"2026-03-09T14:16:26","guid":{"rendered":"https:\/\/gf.com\/?p=15160"},"modified":"2026-03-09T10:17:14","modified_gmt":"2026-03-09T14:17:14","slug":"winning-the-physical-ai-era-together-qa-with-mips-ceo-sameer-wasson","status":"publish","type":"post","link":"https:\/\/gf.com\/blog\/winning-the-physical-ai-era-together-qa-with-mips-ceo-sameer-wasson\/","title":{"rendered":"Winning the Physical AI\u202fera\u00a0together:\u202fQ&A with MIPS CEO Sameer Wasson\u202f\u00a0"},"content":{"rendered":"\n

As Physical AI moves from concept to deployment, intelligence must be distributed across machines\u202fat the edge, in real time and under strict power, latency, safety and cost constraints. <\/p>\n\n\n\n

To prepare for the Physical AI era to take off, GF acquired\u202fMIPS, a leading\u202fprovider of AI and embedded processor IP, software and\u202ftools.\u202fWe sat down with\u202fSameer Wasson, CEO of MIPS<\/a>, to discuss how the combined strengths of MIPS\u2019\u202farchitecture, IP and design\u202fwith GF\u2019s differentiated process technologies gives customers a differentiated path to Physical AI: deterministic, safety-capable compute running at the edge, unlocking the next wave of real machines that sense, think, act and communicate in real time \u2013 and how GF\u2019s purpose-built platforms enable it at scale. <\/p>\n\n\n\n

Why was bringing MIPS into GF\u202fthe right strategic move\u202fto\u202fhelp\u202faddress the Physical AI market?<\/strong> <\/p>\n\n\n\n

AI is at an inflection point and customers\u202fneed\u202freal-time, deterministic intelligence that interacts with the physical world safely and reliably \u2013 what we call Physical AI.\u202fMIPS brings a 40-year heritage of efficient, scalable compute for performance critical systems, now centered on RISC-V application processors and real-time subsystems designed for low latency, functional safety and power efficiency. Pairing that with GF\u2019s differentiated process technologies and global manufacturing gives customers something unique: a platform that spans IP, custom silicon and volume production so they can get to working silicon faster and tailor it to real-world edge AI. <\/p>\n\n\n\n

From powering the Nintendo 64 released in 1996,\u202fto Mobileye\u2019s most advanced driver-assistance chips\u202fEyeQ6 with over 200 million ADAS SoCs shipped,\u202fand even serving as the foundation for leading cloud\u202fhyperscalers\u2019 infrastructure,\u202fwe have\u202fa track record to\u202fdeliver workload focused performance at scale. <\/p>\n\n\n\n

GF\u2019s decision to\u202facquire\u202fMIPS\u202flast year\u202fwas about coming\u202ftogether to create a\u202fmore flexible,\u202fdifferentiated offering\u202ffor customers by\u202fpairing\u202fGF\u2019s\u202fleading process technology and manufacturing scale with\u202fMIPS\u2019\u202fprocessor IP and software enablement.\u202fThat\u202fwas the\u202frationale that sat at the core of the decision, with a shared goal to help our customers get to working silicon faster and tailor that silicon to real-world edge AI needs. The timing\u202fcouldn\u2019t\u202falign\u202fbetter\u202fwith the\u202fsurge in\u202fAI\u202fdemand across transportation, communications & datacenter infrastructure, robotics and intelligent edge markets.\u202f <\/p>\n\n\n\n

How does intelligence show up in each stage of\u202fPhysical AI workloads\u202ffor customers?<\/strong> <\/p>\n\n\n\n

Physical AI takes the capabilities of AI models from the data center and deploys it at the edge. The foundation of Physical AI is what I like to call the S.T.A.C., the closed-loop workload that enables platforms to Sense, Think, Act,\u202fCommunicate\u202fand empowers edge platforms to be intelligent, without sacrificing latency, safety, privacy or efficiency. Each stage has distinct compute and system requirements, and the most successful platforms co-optimize them rather than over-build any single part. <\/p>\n\n\n\n

For Sense<\/strong>,\u202fthe system collects real-time data from sensors like cameras, LiDAR, radar and analog inputs, to understand its surroundings. It must efficiently fuse and prioritize these different data types while staying within tight power limits. <\/p>\n\n\n\n

In the Think <\/strong>stage, the system quickly interprets sensor data and makes decisions using on-device AI and control algorithms. This requires high-performance, low latency compute that delivers deterministic results within strict power budgets\u2014especially for robots and vehicles operating at the edge. <\/p>\n\n\n\n

In the Act <\/strong>stage, the system converts decisions into physical movements by controlling motors, actuators, brakes or robotic limbs. This stage demands ultra-low latency and highly reliable responses so actions like braking or obstacle avoidance happen within milliseconds. <\/p>\n\n\n\n

The Communicate <\/strong>stage is where the system shares information internally and externally\u2014between subsystems, other devices, the cloud or even humans. This requires secure, low latency connectivity and support for multiple communication standards (such as Bluetooth\u00ae LE or 5G) without introducing delays. <\/p>\n\n\n\n

In essence, there\u2019s intelligence of\u202fdifferent kinds\u202fin every stage, from algorithms to better enact precise movement, to advanced multi-modal\u202fperception\u202fprocessing. Each customer\u2019s workload will be a little different inside the S.T.A.C. loop, making flexibility key to successfully enabling Physical AI at the edge\u2014without breaking power, latency or safety budgets.\u202f <\/p>\n\n\n\n

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Where does MIPS differentiate across the S.T.A.C. loop?<\/strong>\u202f <\/p>\n\n\n\n

MIPS differs in two key\u202fareas;\u202fone is our software-first co-design approach. We start by profiling the customers\u2019 workload, running their stack on our virtual platforms and core simulators to expose bottlenecks early. Then we shape the silicon around that from custom instructions to memory subsystem tweaks, so the shipped SoC meets real-world KPIs on day one. Our Atlas Explorer virtual platform is a good example of this \u201cshift-left\u201d approach. <\/p>\n\n\n\n

The second is our deep, workload-specific hardware optimization on open RISC-V.  Because our IP is modular, we can tailor cores and subsystems. MIPS has spent years pioneering multi-threading and functional safety capabilities in our processor IP to deliver event-driven, deterministic real-time performance and functional safety.\u202f <\/p>\n\n\n\n

At the end of the day, we enable our customers to run their workloads on our core models to get insights into platform design ahead of silicon. This helps our customers align their workload and IP\u202fselection\u202ffor the right stages of the workload they are trying to address. The open and modular nature of RISC-V enables us to deliver targeted workload enhancements at the hardware level, down to the core, unlocking deep levels of efficiency and performance.\u202f <\/p>\n\n\n\n

You’ve\u202ftalked about\u202fMIPS\u2019\u202fsoftware-first\u202fapproach.\u202fWhat does that\u202flook like\u202fin practice?<\/strong>\u202f <\/p>\n\n\n\n

It means we start by understanding and profiling the customer\u2019s software workload before finalizing the hardware. By first understanding the software workload, we can deliver insights into optimizations to help with software\/hardware co-design. By doing this, we can identify bottlenecks or specific functions that consume a lot of cycles and then optimize our IP to handle those efficiently. For example, if an autonomous drone\u2019s navigation software is taxing the CPU, we might introduce a custom instruction or tweak the memory subsystem to accelerate it. This co-design process creates a tight feedback loop between software and hardware. As the demand for high-performance, domain specific\u202fcompute accelerates, the ability to analyze and\u202foptimize\u202finteractions between workloads and customizable\u202fcompute\u202fplatforms becomes a\u202ftrue\u202fcompetitive advantage.\u202f <\/p>\n\n\n\n

A software-first approach closes the gap between hardware and software teams, enabling smarter architectural decisions and\u202festablishing\u202fa scalable,\u202flow risk\u202fworkflow for building Physical AI platforms aligned with real-world performance targets. <\/p>\n\n\n\n

In other words,\u202fby the time\u202fchips\u202fare fabricated, customer software is already running smoothly on the silicon.\u202fThis engagement model\u202fultimately accelerates\u202ftime to market because we\u2019ve done all the tuning upfront. It also reduces risk in production\u202fcycles\u202fand empowers deeper partnerships\u2014we work hand-in-hand with customers, which means we\u2019re not just a vendor, we\u2019re a collaborator in their product development. Ultimately, a software-first mindset leads to a scalable, low-risk workflow for building Physical AI platforms: you get the performance you need with fewer surprises, and you hit your performance targets much more reliably. <\/p>\n\n\n\n

How would you describe the value proposition\u202ffrom\u202fthe combined GF + MIPS portfolio?<\/strong>\u202f <\/p>\n\n\n\n

It\u2019s platform leverage. The requirements of new physical AI products converge around the GF and MIPS portfolio; a need for ultra-low power platforms that\u202foperate\u202freliably in harsh conditions,\u202foperate\u202fsafety and securely and are imbued with intelligence; and delivered with supply chain resilience.\u202fTogether, we address the critical needs of next-generation Physical AI products by bridging advanced silicon technology with intelligent processor design. <\/p>\n\n\n\n

GF\u2019s ultra-low power technologies,\u202fincluding its\u202fFDX and\u202fFinFET\u202fplatforms,\u202fenables\u202ffull system integration and\u202freduces power leakage with adaptive body-biasing, to stay within the tight power\u202fenvelopes\u202fof Physical AI applications\u202frequire.\u202fGF\u2019s\u202fembedded memory, RF\u202fintegration\u202fand advanced packing\u202falso\u202fempower us to build dense, efficient SoCs\u202fthat Physical AI depends on for real-time responsiveness and power efficiency in deployed systems.\u202f <\/p>\n\n\n\n

With this\u202fsynergy\u202fof our portfolios, we can now help customers:\u202f <\/p>\n\n\n\n